The present invention relates to arithmetic and logic units and particularly to arithmetic and logic units implemented in accordance with hierarchical methods for large scale integration using semiconductor technology.
Cellular integrated circuits and hierarchical methods for forming large scale integrated circuits have been described in the above cross-referenced application entitled CELLULAR INTEGRATED CIRCUIT AND HIERARCHICAL METHOD. Briefly, the cellular integrated circuits are formed using one or more basic cells. For example, an INVERT basic cell (BC1), a 2-input NAND basic cell (BC2), a 2-input, 2-wide AND-OR-INVERT basic cell (BC5) and a 2-input NOR basic cell (BC6) among others are described in that application.
The basic cells and the resulting integrated circuits are formed with a grid pattern on a semiconductor body. The grid pattern is defined by parallel grid lines extending at angles (for example, 90 degrees) to each other along X and Y axes. One integrated circuit is formed by a plurality of interconnected basic cells. Each basic cell is formed by a plurality of active elements. Each of the basic cells is disposed within an area, generally no greater than a predetermined size, overlying a plurality of grid lines in both the X and Y axes. In this manner, each basic cell overlies a plurality of intersections of grid lines and those intersections define predetermined grid points. Each basic cell typically includes a power bus, a ground bus, one or more inputs and one or more outputs all having a predetermined arrangement with respect to certain grid points. The power bus, the ground bus, the inputs and the outputs connect internally to the basic cell at selected different grid points. Basic cells are interconnected with other basic cells to form larger integrated circuit units which are called unit cells. A number of unit cells are similarly interconnected to form still larger integrated circuits called functional blocks or functional generators. An arithmetic and logic unit (ALU) is an example of a functional block.
Arithmetic and logic units are well-known. For example, the Texas Instrument type SN74181 is one typical example of a 4-bit ALU. The 4-bit ALU has the four A inputs A.sub.0, A.sub.1, A.sub.2, and A.sub.3, the four B inputs B.sub.0, B.sub.1, B.sub.2 and B.sub.3 and has the respective four F outputs F.sub.0, F.sub.1, F.sub.2 and F.sub.3. The A and B inputs are combined either in an arithmetic operation mode or in a logic function mode to form the F outputs. The mode is controlled by a mode line, M. In the arithmetic operation mode, one of sixteen different arithmetic operations can be formed as a function of the state of the four S input control lines S0, S1, S2, and S3. Similarly, in the logic function mode, one of sixteen different logic operations can be performed as a function of the S input control lines.
The arithmetic and logic units previously known have been implemented with logical gate structures which are either not generally suitable for cellular integrated circuits and hierarchical methods or which are otherwise more complex than is necessary. Accordingly, there is a need for improved arithmetic and logic units which are particularly suited for forming cellular integrated semiconductor circuits.
In accordance with the above background, it is an object of the present invention to provide an improved arithmetic and logic unit particularly suited for implementation using cellular integrated circuits and hierarchical methods.